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| ==EPYC Genoa==
| | #REDIRECT [[Genoa]] |
| [[file : Epyc_genoa.png | center | 500px]]
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| In brief : At OCP Summit 2022, AMDlaunching next-generation AMD EPYC 9004 4th-gen CPU, code name Genoa on November 10, 2022. AMD Genor supports up to 96 cores with 192 threads with 5nm manufacturing process. 12-channel DDR5 memory, Compute Express Link 1.1 standards as well as more PCIe Gen5 capabilities. HPCMATE with local and global partners are preparing HPC optimized AMD based server in Q2 2023.
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| === Genoa ===
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| Code-named AMD Genoa, the new line of CPUs supports 12 channels of DDR5-4800 (up to 6TB memory capacity per socket), 128 lanes of PCIe Gen5, AMD Infinity Fabric/Guard technology, and up to 96 cores. This makes them ideal for critical workloads across cloud, enterprise, and high-performance computing.
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| <!-- [[file : Epyc_genoa.png | center | 500px]] -->
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| <p align="center"> <youtube>ytITVteSeOI&t=3s</youtube> </p>
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| With its massive 96-core-count in a single processor, the new AMD Genoa processors will allow organizations to reduce their physical footprint by deploying fewer servers while leveraging more powerful servers.
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| ===Key features===
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| The CPU chiplets will be able to house up to '''64 cores and 128 threads'''. The EPYC Genoa processors will also have access to faster 8 channel DDR4 memory lanes, allowing for higher bandwidth. Genoa SoCs support both single and 2-way multiprocessing with up to a maximum of 64 cores (and 128 threads) per processor for a total of up to 128 cores (and 256 threads) for a 2-way MP system. Those SoCs support '''128 PCIe Gen 4 lanes each''', however, ''half of them are lost when in 2-way MP'' (leaving the system with the same overall lanes count as a single socket solution). Communication between the two chips is done via AMD's [[Infinity Fabric]] protocol over the 64 reserved lanes. Genoa is backwards platform/socket compatible with Naples and forward-compatible with Milan.
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| [[file : Epyc_genoa_iodie.png | center | 500px]]
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| Genoa will support 3200 MHz RAM in eight channels, for up to 4 TB of RAM per socket (While Intel is presently limited to 2 TB across six channels, and only up to speeds of 2666 MHz)
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| PCIe 4.0 and 128 PCIe lanes
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| Intel processors have significantly higher TDPs at the high-end, much higher prices at the low-end, and far less cache the whole way through
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| In summary, all Genoa processors have the following:
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| * 128 PCIe lanes PCIe Gen 4 (in both single-way and dual-way multiprocessing)
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| * Octa-channel Memory
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| * Up to DDR4-3200 ECC 4 TiB (8 TiB in 2MP)
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| * Up to 64 cores / 128 threads
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| * Everything up to AVX2 (i.e., SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2), and SHA
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| ===EPYC Genoa series===
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| [[file : Epyc_roadmap.png | center | 500px]]
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| According to Techspot<ref>https://www.techspot.com/news/80631-amd-7nm-epyc-genoa-specs-prices.html</ref>, AMD is bringing 64, 48, 32, 24, 16, 12 and 8 core variants to the market this time, most of which are available in three configuration options. A fancy-pants dual-socket compatible version, a single-socket version with identical specs (bar one or two exceptions) and a ‘budget’ variant that cuts back a little while increasing power efficiency
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| [[file : Epyc_genoa_series.png | center | 500px]] | |
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| The AMD EPYC Genoa processor family is expected to lift AMD’s server CPU market share to 10% by 2020. AMD’s 32-core processor is 29% cheaper than Intel’s 28-core, their 24-core part is 57% cheaper, and their 16-core part is 69% cheaper <ref>AMD 7nm Epyc Genoa specs and prices leak</ref>
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| * Wccftech’s article shows EPYC Genoa 7452 with 32 cores moninating position against Intel’s Xeon and much faster than EPY Naples <ref>EPYC Genoa 7452 with 32 cores moninating position against Intel, url=https://wccftech.com/amd-epyc-7452-7nm-rome-server-cpu-benchmark-versus-intel-xeon/</ref>
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| * Dell EMC announced that they will be launching servers powered by AMD’s newest architecture – a 7nm architecture codenamed ‘Genoa’ – in the second half of 2019 - Dominique Vanhamme (DELL EMEA vice president)
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| * Microsoft took the stage at its E3 2019 keynote, announcing that the system-on-a-chip powering the next Xbox, Project Scarlett, is using Zen 2 cores and AMD Navi graphics. Microsoft certainly is talking a deep partnership with AMD during computex. When talking about Windows, Roanne explicitly mentioned "mission critical system...and government" during Computex on stage, as well as "premium sector and next level".
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| ==Reference==
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| <references />
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| [[category : article]]
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| [[category : tech]]
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| [[category : AMD]]
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